When set to some 1 a examine procedure isselected, and when set to the zero a publish operation isselected. The next two bytes been given outline theaddress from the to start with details byte (Determine 3-3). Due to the fact only A12...A0 are utilized, the higher 3 tackle bitsare really don't care bits.
The higher address bits are trans-ferred first, followed by the less important bits. Pursuing the start problem, the 24XX64 monitorsthe SDA bus checking the machine variety identifier beingtransmitted.
Upon obtaining a 1010 code and appropri-ate system decide on bits, the slave machine outputs anAcknowledge signal on the SDA line.
Based on thestate of the R/W little bit, the 24XX64 will choose a read orwrite procedure.Determine 3-2: Regulate BYTE FORMAT3.seven Contiguous Addressing Across Various DevicesThe chip find bits A2, A1, A0 is usually accustomed to expandthe contiguous handle space for as much as 512K bits byadding as many as eight 24XX64's around the same bus.
In thiscase, program can use A0 of your management byte asaddress bit A13, A1 as tackle little bit A14, and A2 asaddress bit A15. It's not possible to sequentially readacross device boundaries.
Subsequent the start problem from the master, thecontrol code (four bits), the chip pick out (a few bits), andthe R/W bit (which can be a logic low) are clocked onto thebus from the grasp transmitter. This means to theaddressed slave receiver which the handle substantial byte willfollow soon after it's created an Accept bit duringthe ninth clock cycle.
Hence, the subsequent byte transmit-ted from the grasp could be the high-order byte on the wordaddress and will be composed to the deal with pointer ofthe 24XX64.
The next byte would be the Minimum SignificantAddress Byte. Soon after obtaining one more Acknowledgesignal within the 24XX64 the grasp product will transmitthe data term to be published in the addressed memorylocation. The 24XX64 acknowledges yet again and themaster generates a End affliction.
